Also known as: Retimer Board Design Engineer; SerDes Board Integration Engineer; PCIe Retimer Hardware Engineer; High-Speed Link Hardware Engineer
See this role on the SoC lifecycle
Places and tunes retimers and SerDes links on boards and cables so long PCIe, CXL and Ethernet channels close margin.
Work in progressNo day-in-the-life description has been written for this role yet. If you do this work, we would welcome yours. Suggest a source or a correction
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