Also known as: Risk Manager, Silicon Programs; Program Risk Lead; Technical Risk Manager; Risk and Opportunity Manager
See this role on the SoC lifecycle or on the Soft IP lifecycle
Identifies, quantifies and drives mitigation of technical, schedule and supply risks that could derail chip programs.
Work in progressNo day-in-the-life description has been written for this role yet. If you do this work, we would welcome yours. Suggest a source or a correction
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