Performance Verification Engineer

Project

Work done for a product or program.

• Build performance test environments that generate realistic concurrent traffic across interconnect masters, memory controllers and accelerators.
• Measure end-to-end latency distributions, sustained bandwidth and outstanding-transaction occupancy against architectural performance targets.
• Correlate RTL-measured performance with the architectural performance model and drive investigation of any divergence beyond tolerance.
• Verify quality-of-service mechanisms including arbitration weights, priority classes, bandwidth regulators and latency-sensitive traffic guarantees.
• Characterise DRAM controller efficiency under mixed read/write traffic, measuring bank conflicts, refresh impact, page hit rate and bus turnaround overhead.
• Profile cache hierarchy behaviour including hit rates, miss latency, prefetch effectiveness and coherency traffic overhead under workload traces.
• Run performance workloads on emulation to reach realistic workload lengths that simulation cannot cover.
• Identify performance bottlenecks such as undersized buffers, serialising handshakes or arbitration starvation and quantify the impact of proposed RTL fixes.
• Produce performance signoff reports establishing that each committed datasheet performance number is achievable in silicon.
• Replay real customer or benchmark traffic traces through the RTL to validate performance on workloads that matter commercially.

Function

Work that keeps the discipline running: methods, tools, suppliers and people.

• Maintain the verification methodology, reusable components and coding guidelines.General
• Improve regression infrastructure, run time and debug tools with the CAD team.General
• Share failure analysis and escape reviews so later projects avoid the same bugs.General

Project

1. Produce and hand over the role's key deliverables
   • Performance verification environment with configurable traffic generators
   • Bandwidth, latency and QoS measurement reports versus architectural targets
   • RTL-versus-performance-model correlation analysis
   • Bottleneck analysis with quantified RTL improvement proposals
   • Performance signoff report backing datasheet commitments
2. Plan verificationGeneral
   • Extract the features to verify from the specification
   • Define coverage goals and the test strategy
   • Review the plan with design and architecture
3. Close verificationGeneral
   • Build testbenches and tests
   • Run and triage regressions
   • Report coverage and sign off

Function

1. Keep the methodology currentGeneral
   • Maintain reusable verification components
   • Update guidelines after each project
2. Improve the infrastructureGeneral
   • Reduce regression run time
   • Improve debug and coverage tools