Memory Device & Cell Engineer

Project

Work done for a product or program.

• Characterise cell-level electrical behaviour including capacitance, leakage, retention time, subthreshold slope and threshold voltage window across temperature.
• Build and calibrate TCAD models of the access transistor, capacitor or charge-trap stack against measured silicon data.
• Extract and maintain SPICE and compact models for the memory cell and periphery devices that circuit designers simulate against.
• Investigate cell-level failure physics such as variable retention time, gate-induced drain leakage, trap-assisted tunnelling and random telegraph noise.
• Define device targets and specification limits for each process split and negotiate them with process integration.
• Design and analyse device test structures, array macros and charge-pumping or DLTS experiments for defect characterisation.
• Quantify device variability and its statistical distribution to feed the design margin and sigma targets used in circuit signoff.
• Support reliability and yield teams with device-level explanations behind failure signatures observed in test or the field.

Function

Work that keeps the discipline running: methods, tools, suppliers and people.

• Evaluate scaling limits and alternative cell options — IGZO access transistors, 3D DRAM, capacitorless cells, MRAM and RRAM stacks — for the technology roadmap.
• Publish and review internal technical reports and, where applicable, external papers at IEDM, VLSI Symposium and IRPS.

Project

1. Produce and hand over the role's key deliverables
   • Calibrated TCAD and compact device models for the cell and periphery
   • Device target and specification sheet per process split
   • Cell-level characterisation and variability reports
   • Failure physics investigation reports for retention and leakage mechanisms
   • Device test structure and macro design set
   • Scaling limit and emerging-cell option assessment
2. Run research projectsGeneral
   • Define hypotheses and experiments
   • Build test structures or models
   • Analyse and report the results
3. Transfer resultsGeneral
   • Hand findings over to development
   • Support early adoption

Function

1. Stay currentGeneral
   • Review the literature
   • Work with universities and consortia
2. Protect and shareGeneral
   • File invention disclosures
   • Publish where allowed