Roles / Compiler Autotuning Engineer

Compiler Autotuning Engineer

AIS-024v1

AI/ML Silicon Software Stack & Co-DesignSoftwareIC3–IC6Individual contributor

Also known as: Performance Autotuning Engineer; ML-for-Compilers Engineer; Cost Model Engineer

See this role on the AI accelerator lifecycle or on the SoC lifecycle

Summary

Replaces hand-written compiler heuristics with learned cost models and automated search so the toolchain finds near-optimal schedules for shapes and models nobody tuned by hand.

A day in the life

Work in progressNo day-in-the-life description has been written for this role yet. If you do this work, we would welcome yours. Suggest a source or a correction

Responsibilities

Project

Work done for a product or program.

Build analytical and learned cost models that predict kernel latency from schedule parameters without running on hardware.
Implement search strategies including genetic algorithms, Bayesian optimization, simulated annealing and reinforcement learning over schedule spaces.
Define and prune tunable schedule spaces covering tile sizes, unroll factors, vectorization, pipeline depth and layout choices.
Operate distributed measurement infrastructure that evaluates thousands of candidate schedules per hour on real devices.
Integrate tuned results back into the compiler as shipped heuristic tables or on-demand tuning modes.
Balance tuning time against achieved performance and expose tuning budget controls to customers.
Detect and handle measurement noise, thermal drift and device variation in the tuning loop.
Collaborate with kernel engineers to encode their intuitions as search-space constraints rather than fixed choices.

Function

Work that keeps the discipline running: methods, tools, suppliers and people.

Train and maintain cost models on measurement databases and monitor for drift after hardware or compiler changes.
Benchmark autotuned results against expert hand-tuned kernels and report the remaining gap.

Major tasks

Project

Produce and hand over the role's key deliverables
- Learned cost model with documented prediction accuracy
- Autotuning search framework and schedule-space definitions
- Distributed measurement infrastructure and results database
- Shipped heuristic tables derived from tuning campaigns
- Autotuned versus hand-tuned performance comparison reports
Develop the softwareGeneral
- Design to the hardware specification
- Write and review the code
- Test on models, emulation or silicon
Release and supportGeneral
- Package and document releases
- Fix customer-reported defects

Function

Maintain the platformGeneral
- Keep build, test and release tools working
- Track toolchain and operating system changes
Raise qualityGeneral
- Run code reviews
- Extend automated tests

Works with

Typical backgrounds

MS or PhD in Computer Science with compilers, optimization or machine learning focus; 3–9 years spanning compiler engineering and applied optimization.

Demand signal

0 open listings right now
0 Talent Wafer employer inquiries

Counts live listings tagged to this role, and employer interest in candidates from Talent Wafer runs for this role (all runs to date). Hub activity only, not the wider market.

Comp tier (within semis)

3 / 5

Remote feasibility

High

Semis core vs. portable

Semis-primary, transfers

Geographic hotspots

Santa Clara, Seattle, Toronto, Cambridge UK, Zurich, Bangalore, Shanghai, Beijing

Certifications / standards training

—

Transfers to (industries)

Cloud query optimization, HPC performance engineering, AutoML platform vendors, operations research and industrial optimization

Risk if vacant

Only the shapes an engineer manually tuned run fast, so customer workloads with unusual dimensions fall off a performance cliff and the tuning burden grows with every silicon generation.

Compiler Autotuning Engineer

Summary

A day in the life

Responsibilities

Project

Function

Major tasks

Project

Function

Works with

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