Also known as: Package Design Engineer; Substrate Design Engineer; IC Packaging Engineer (Custom Silicon); Package and Signal Integrity Engineer
See this role on the SoC lifecycle
Designs and verifies the package and substrate for customer ASICs so signal, power and thermal targets are met alongside the die.
Work in progressNo day-in-the-life description has been written for this role yet. If you do this work, we would welcome yours. Suggest a source or a correction
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