A State Augmented Approach to Paralle Modeling in High-Level Synthesis

High-level synthesis (HLS) can schedule only the concurrency made legal by its input description. For feedback-coupled designs, a sequential behavioral model can obscure the architectural state boundaries and hazard resolution needed for efficient overlap. We develop an explicit architectural modeling methodology based on synchronous sequential processes that start in lockstep and synchronize completion before repeating. Persistent state, communication, and feedback control are represented in C…

Source: arXiv cs.AR (Hardware Architecture), published 2026-10-28. The summary is the Hub's own; the full story is at the source. Report a rights or accuracy concern