The changes made to the design software when bring-up shows that the software and the silicon disagree, with the tests that guard them.
Source Work product in the FPGA chip development lifecycle
Bring-up is the first time real bitstreams meet real silicon, and some differences are best fixed in software. Recording each fix with a test keeps it in every later release.
The full lifecycle detail, with its charts, flows, tables and every section, is for registered members. Registration is free and takes a minute. You come back to this page afterwards.