The design software release with production timing data for each speed and temperature grade, which customers use to sign off their designs.
Release package Work product in the FPGA chip development lifecycle
Customers sign off and ship designs on this data, so it must be backed by characterisation across corners and by the binning tests that sort parts. It marks the point where the device can be designed in for production.
The full lifecycle detail, with its charts, flows, tables and every section, is for registered members. Registration is free and takes a minute. You come back to this page afterwards.