A build of the vendor's design software that supports the new device before silicon: the device model, synthesis and packing, placement, routing, timing analysis with advance timing data, power estimation and bitstream generation.
Release package Work product in the FPGA chip development lifecycle
Software and silicon must agree before tape-out, and bring-up needs working software on the first day of silicon. The build lets the bitstreams it generates be simulated on the device model and gives bring-up its starting point.
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