The schematic, layout and bill of materials for the load board, designed from the test hardware specification to deliver clean power, accurate signals and the required number of test sites.
Design data Work product in the Test program and ATE development lifecycle
It sets the electrical quality of every test measurement made through the board. Without a careful design, power integrity and signal integrity problems appear on the tester as yield loss or poor correlation, and board respins delay first silicon test.
The full lifecycle detail, with its charts, flows, tables and every section, is for registered members. Registration is free and takes a minute. You come back to this page afterwards.