The physical layouts of input and output cells and their protection structures, drawn to the design rule manual and the kit discharge and latch-up rules, before characterisation and release.
Design data Work product in the Process design kit (PDK) development lifecycle
It is the physical basis of the IO library, and errors in it carry through every later view. Layouts that are wrong or unverified make characterisation describe cells that cannot be built reliably, and protection fails in silicon.
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