Chip lifecycle / Work products / Integrated RTL

Integrated RTL

The SoC design code with every IP block connected in: the top level, the interconnect and the glue logic.

Source Work product in the SoC and full-chip lifecycle

Why it exists and what it decides

It is where all IP blocks come together into one chip design, so integration errors and interface mismatches are found and fixed. Teams working on different combinations of IP versions leave full-chip verification with no stable target.

Decisions it informs

Whether all IP is integrated well enough for IP integration complete and RTL freeze
Which IP versions are in the frozen design
Whether the interconnect and glue logic meet the specification

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