The released layout of the macro as a GDS stream file for the target process, with its layer map, cell name and version, ready for integrators to place in their chips.
Design data Work product in the SoC and full-chip lifecycle and the Hard IP lifecycle
It is the macro itself as the integrator receives it. Because it cannot be changed by the integrator, it must be the exact layout that passed sign-off, and its version must tie to the views and reports released with it.
The full lifecycle detail, with its charts, flows, tables and every section, is for registered members. Registration is free and takes a minute. You come back to this page afterwards.