The plan of which family members are released, in what order and when, with their densities, packages and grades, and how the family relates to earlier and later families.
Plan Work product in the FPGA chip development lifecycle
Customers design in a family only when the members they need are available, so the order of release matters as much as the first member. The roadmap aligns engineering, supply and customers on which member comes next.
The full lifecycle detail, with its charts, flows, tables and every section, is for registered members. Registration is free and takes a minute. You come back to this page afterwards.