A ranked chart and table of the defect or failure types that cause the most yield loss, built from test results, inspection and failure analysis, so that improvement effort goes to the largest contributors first.
Analysis Work product in the Process technology (node) lifecycle, the Memory product lifecycle (DRAM, NAND and HBM) and the Package technology development lifecycle
It focuses limited engineering effort on the few defect types that cause most of the loss. Teams that work on the problems they see most easily, rather than the ones that matter, argue yield readiness from anecdotes. In process, memory and package lifecycles the categories differ, but the ranking discipline is the same.
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