The plan that matches manufacturing and test capacity, across wafer fabrication, assembly, test and key materials, to the forecast demand for the product or technology over time.
Plan Work product in the Chiplet and advanced packaging lifecycle, the Process technology (node) lifecycle, the Memory product lifecycle (DRAM, NAND and HBM), the Power and compound semiconductor lifecycle, the MEMS and sensors lifecycle, the Package technology development lifecycle, the FPGA chip development lifecycle and the Product lifecycle
It ensures the product can be supplied at the volumes customers need, and shows early where investment, second sources or allocation are required. Ramps that stall at an unplanned bottleneck put customers on allocation without warning, and discontinuance and last time buy decisions are taken without knowing what can still be built. In process node, memory, package and power lifecycles the plan covers the technology's shared capacity across many products.
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