1. Purpose of the gate
Silicon validation answers a simple question with a lot of work: does the chip do what the specification says, across the conditions it will be used in? Bring-up proves the chip is alive. Validation then measures each specified feature, runs real workloads, and characterises behaviour across voltage, temperature and process variation. This gate confirms that the measurements are complete and that every difference from the specification is either fixed in a planned revision or listed as an erratum with its impact.
Three criteria apply. All specified features must be measured, with any exception listed as an erratum. Characterisation across voltage and temperature is tracked, since it often continues into qualification as more parts and more process corners become available. Open high-severity silicon issues are tracked, so the review knows which problems remain and whether they need a hardware fix, a software workaround or a datasheet change.
Gating work products at this gate are the bring-up report, final, and the errata list at its initial released form, along with the silicon correlation report from performance and power analysis. Characterisation data is updated, drivers are updated and the board support package reaches its first version. Pattern debug results from DFT and the emulation to silicon correlation are final. Risks addressed include functional bugs found in silicon, not enough margin across conditions and performance or power targets missed.
10 more sections for registered members.