1. Purpose and scope
Pre-silicon evidence is strong for logic and weak for physics. Real side-channel leakage depends on the process, the layout and the package; fault behaviour depends on how circuits respond to voltage, clock, electromagnetic and light disturbances. Silicon evaluation tests the chip as an attacker would, with the access and equipment the threat model assumes, and finds what simulation could not.
It is also where the product meets its ecosystem. The security protocols, attestation formats and key exchange schemes the product supports must work with the peers customers use, so conformance suites and interoperability tests run on the same samples. Every weakness found becomes a decision: fix in a new stepping, mitigate in firmware, or accept and document.
In scope: the penetration test report, the side-channel evaluation report, the fault attack test report, the security protocol interoperability report, the countermeasure effectiveness review and the security errata list. Out of scope: the independent laboratory evaluation for certification, which follows in Certification & Assurance.
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