1. Purpose and scope
Good architecture can still be undone in implementation. A reset value that leaves a security register open for a few cycles, a debug path that bypasses an access check, a test mode that exposes a key on scan, or a firmware parser that trusts a length field are all design defects that defeat an otherwise sound architecture. This stage builds the security blocks and code with rules aimed at those defects and reviews them against the threat model.
Countermeasures need special care because ordinary design tools treat them as waste. Synthesis may merge redundant logic, retiming may move masked values together, and layout may place sensitive nets where they couple. The design stage marks countermeasure structures and hands constraints to implementation, so later steps keep them intact.
In scope: security block RTL, cryptographic accelerator RTL, debug access control design, boot ROM security code and security firmware, secure design and coding rule checks and the secure design review record. Out of scope: the verification campaign, which follows in Security Verification.
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