1. Purpose and scope
The virtual platform runs software against models written from the specification; prototypes run it against the real design. Emulators run the RTL in dedicated hardware, slower than silicon but with full visibility into every signal, which makes them the place to find and debug hardware and software interaction problems. FPGA prototypes map the RTL onto FPGA boards, faster than emulation and close enough to silicon speed to boot full operating systems, run real interfaces and give software teams many hardware targets at once.
On a platform, this work is done once for the common hardware so that the shared software is proven once. Running the platform's subsystems and its lead configuration with the real boot code, board support and operating system finds the problems that only appear when hardware and software meet: wrong reset values, interrupt races, power state transitions, cache coherency issues, performance shortfalls. Fixes made now go into the platform IP before the lead product tapes out, so every derivative inherits them.
In scope: prototype builds on emulation and FPGA, firmware bring-up on prototypes, software on prototype test results, the prototype validation report, updates to the conformance test suite from prototype runs, the IP errata list and the reference board design used to connect prototypes to real interfaces. Out of scope: validation on the lead product's silicon, which belongs to Lead Product Integration & Validation, and the derivative's own prototypes, which its SoC lifecycle plans.
12 more sections for registered members.