1. Purpose of the gate
The circuit design review is the last point at which the circuit can change cheaply. It checks that the schematic uses only locked library components, that photonic and co-simulation show the transmitter and receiver meet their budget allocation across the agreed corners and variation, and that the control strategy keeps sensitive devices at their operating point.
It also confirms that the circuit can be laid out and tested: the floorplan is feasible and the parameters wafer test must measure are known.
What done means at this gate: the photonic circuit and its drivers and receivers meet their targets in simulation, including co-simulation of the full electro-optic path and the effect of process and temperature variation.
The gate closes the Photonic Circuit Design & Simulation stage, which covers designing the photonic circuit from library components and simulating it together with its drivers, receivers and control loops: optical circuit simulation in the frequency and time domains, electro-optic co-simulation of the full transmitter and receiver, thermal simulation of heaters and crosstalk, wavelength and bias control, and statistical analysis of how process variation moves the wavelength, loss and bandwidth.
10 more sections for registered members.