1. Purpose of the gate
The first MEMS wafers and interface ASIC wafers are out, probed and ready to be built into prototype assemblies.
First wafers are the first physical test of the co-design. Before parts are assembled and measured, the gate checks that the MEMS wafers ran on the frozen baseline and that their process control monitors show the run was inside its windows, that the ASIC wafers passed basic probe, and that dies have been chosen for assembly with their wafer positions recorded.
It also checks readiness for what follows: the prototype assembly route, the bench stimulus equipment calibrated against references, and a measurement plan that names each parameter, condition and model comparison. Without these, prototype data cannot be traced or trusted, and model correlation becomes guesswork.
A short, factual gate held well saves weeks in the next stage. Many prototype surprises turn out to be wafers that ran outside their window, parts taken from the wafer edge, or benches whose stimulus was never checked; this gate catches those before they are mistaken for design problems.
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