1. Purpose of the gate
The test chip carrying the macro, its test structures and its measurement interface is checked and its database released to the foundry; this version of the macro is locked.
The test chip is the only route to silicon proof, and a test chip that cannot measure what the validation plan needs wastes a wafer run. This gate checks that the test chip is clean, that it carries the signed-off macro, and that the validation and reliability plans can be carried out on it.
Three criteria apply. Test chip sign-off checks are clean, or waived with the foundry. Validation and reliability plans are approved. The database is accepted by the foundry.
The gate also locks the macro version. From this point, any fix becomes a new version with its own sign-off, so the macro that integrators receive can always be traced to the silicon that proved it.
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