1. Purpose of the gate
The configuration memory, the configuration controller, the bitstream format and the security features are baselined, so the tiles, the software and the bitstream generator can be built against them.
After this gate, tile designers build the configuration cells and frame logic, the software team builds the bitstream generator and the configuration verification starts. The bitstream format in particular is a long commitment: customers' tools, programming flows and field update systems will depend on it for the life of the family.
The review checks that the configuration architecture covers every interface, start-up, readback, partial reconfiguration where offered, and upset detection and correction; that the bitstream format covers every fabric cell and every hard block setting; and that the bitstream generator team has agreed it.
On the security side, the review checks the threat model. Every threat, from copying a design out of external memory to replacing it in the field, attacking keys through side channels or reaching the configuration through test and debug paths, has a feature that addresses it or a recorded accepted risk. Key programming in customers' factories is reviewed as a security feature in its own right.
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