The physical design lead and the tape-out engineer use this before the tape-out gate to confirm every sign-off is complete on the final database of the family member, and that bring-up and qualification are planned.
MustTiming of the configuration logic, clock networks and hard IP interfaces is met at every sign-off corner, or waived with reasons.
MustPower integrity and electromigration are within limits under heavy customer design activity and at configuration.
MustPhysical verification is clean, or each waiver is accepted by the foundry.
ShouldGate-level verification of the final netlist is complete.
23 more items for registered members.
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