Jobs / Principal Logic Design Engineer - UALink IP/Subsystem

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Listed by the Hub from Astera Labs's careers page, seen 2026-10-28. Apply on the company's site.

Principal Logic Design Engineer - UALink IP/Subsystem

Digital DesignStaff / PrincipalOn-site

Bengaluru, India · Listed on the Hub 2026-10-28 · Posted by the company 2026-09-17 · Listed until 2026-12-27

We are looking for a Principal Logic Design Engineer with strong expertise in high-performance interconnect and SoC/IP design to lead RTL and microarchitecture development for UALink-based IP/subsystems . Lead architecture and RTL development for UALink IP/subsystems. Translate protocol and system requirements into scalable hardware architecture. Design high-bandwidth, low-latency data paths and control logic.

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