Standard · Interfaces & SerDes
JESD204B
The JEDEC serial interface standard linking high-speed data converters to FPGAs and ASICs, replacing wide LVDS buses with a few multi-gigabit lanes and adding deterministic latency for multi-converter synchronisation.
- Also known as
- JESD204
- Type
- Standard
- Domain
- Interfaces & SerDes, Peripheral and embedded bus
Notes
Deterministic latency via the SYSREF and SYNC signals is the feature that made phased array and MIMO radio designs practical.
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