Process · Embedded Software & Tools
Cache maintenance
The explicit clean and invalidate operations software must perform so that a cached view of memory agrees with what another master, such as a DMA engine, sees. Required on cores whose caches are not coherent with the system interconnect.
- Also known as
- Cache clean and invalidate, Cache flush
- Type
- Process
- Domain
- Embedded Software & Tools, Memory and execution
Notes
Getting the order wrong is a classic intermittent bug: clean before a DMA read of your buffer, invalidate after a DMA write into it.
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