Term · Verification & Validation
Bug escape
A functional defect that survived pre-silicon verification and is found in silicon or in the field. Escape analysis asks what class of stimulus, checker or coverage item would have caught it, and feeds that answer back into the methodology.
- Also known as
- Escaped bug
- Type
- Term
- Domain
- Verification & Validation, Verification management
Notes
Published studies consistently attribute a majority of respins to functional or logic bugs rather than to timing or physical issues.
Related terms
- Post-silicon validation
- Respin
- Bug rate curve
- Verification signoff
Part of the Verification & Validation glossary, with every term in the topic and the lifecycles, tools and standards that use them.
Where it appears on the Hub
No other page of the Hub uses this term yet.
Suggest an improvement
Suggest an improvement to this entry
A clearer definition, an example, a correction or a source an editor can check. Editors review every suggestion before the entry changes.
Last reviewed: not yet reviewed in depth. Entry last updated . The full glossary